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1. 10. Playing with binary numbers.mp4
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MP4
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41 MB
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1. 10. Playing with binary numbers.srt
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SRT
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14.6 KB
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1. 15. Introduction to Logic gates.mp4
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MP4
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24 MB
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1. 15. Introduction to Logic gates.srt
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SRT
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5.4 KB
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1. 2. Types of Number Systems.mp4
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MP4
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27.9 MB
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1. 2. Types of Number Systems.srt
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SRT
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7.8 KB
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1. 22. Minterms and SOP for circuit design.mp4
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MP4
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112.9 MB
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1. 22. Minterms and SOP for circuit design.srt
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SRT
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26 KB
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1. 25. Karnaugh Maps for Gate Minimization.mp4
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MP4
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132.4 MB
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1. 25. Karnaugh Maps for Gate Minimization.srt
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SRT
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27.6 KB
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1. 27. Classification of Logic Circuits.mp4
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MP4
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19.8 MB
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1. 27. Classification of Logic Circuits.srt
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SRT
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4.2 KB
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1. 40. Basics of Sequential Logic Design.mp4
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MP4
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21 MB
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1. 40. Basics of Sequential Logic Design.srt
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SRT
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5.1 KB
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1. Complete State Definition for a Sequence detector.mp4
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MP4
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121.9 MB
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1. Complete State Definition for a Sequence detector.srt
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SRT
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23.3 KB
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1. Frequency Division using Flip Flops.mp4
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MP4
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67.6 MB
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1. Frequency Division using Flip Flops.srt
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SRT
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13.9 KB
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1. Introduction.mp4
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MP4
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24.9 MB
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1. Introduction.srt
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SRT
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7 KB
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1. Problem 1.mp4
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MP4
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34.6 MB
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1. Problem 1.srt
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SRT
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9.2 KB
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1. Problem Sheet 1 with Solutions.html
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HTML
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0 B
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1. Self Complementing code, 9's complement.mp4
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MP4
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46.2 MB
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1. Self Complementing code, 9's complement.srt
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SRT
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12.2 KB
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1.1 Half adder and full adder.pdf
|
PDF
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716.1 KB
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1.1 PS1.pdf
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PDF
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1.9 MB
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10. 36. Transmission of data using Encoder and Decoder circuits.mp4
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MP4
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66.7 MB
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10. 36. Transmission of data using Encoder and Decoder circuits.srt
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SRT
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17.7 KB
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10. Final Outcome - Designing a Digital Logic Circuit (An Example).mp4
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MP4
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62.2 MB
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10. Final Outcome - Designing a Digital Logic Circuit (An Example).srt
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SRT
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14 KB
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11. 37. All about Multiplexers.mp4
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MP4
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36 MB
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11. 37. All about Multiplexers.srt
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SRT
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12.7 KB
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12. 38. Demultiplexers.mp4
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MP4
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13.9 MB
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12. 38. Demultiplexers.srt
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SRT
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4 KB
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13. 39. Implementing any function using MUX - Crucial point of logic design.mp4
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MP4
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62.6 MB
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13. 39. Implementing any function using MUX - Crucial point of logic design.srt
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SRT
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16.3 KB
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2. 11. Performing Arithmetic Operations on Binary Numbers.mp4
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MP4
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49.3 MB
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2. 11. Performing Arithmetic Operations on Binary Numbers.srt
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SRT
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14.7 KB
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2. 16. AND, OR Gates.mp4
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MP4
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62.2 MB
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2. 16. AND, OR Gates.srt
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SRT
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10.9 KB
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2. 23. Maxterms and POS.mp4
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MP4
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70.2 MB
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2. 23. Maxterms and POS.srt
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SRT
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12.9 KB
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2. 26. Some problems on K Maps.mp4
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MP4
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63.9 MB
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2. 26. Some problems on K Maps.srt
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SRT
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16.9 KB
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2. 28. Half Adder Design.mp4
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MP4
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27.6 MB
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2. 28. Half Adder Design.srt
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SRT
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6.8 KB
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2. 3 Bit Magnitude Comparator - Notes.html
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HTML
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0 B
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2. 3. Decimal to Binary Conversion.mp4
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MP4
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24.3 MB
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2. 3. Decimal to Binary Conversion.srt
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SRT
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8.8 KB
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2. 41. Clock Signals and Triggering.mp4
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MP4
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27.1 MB
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2. 41. Clock Signals and Triggering.srt
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SRT
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6.3 KB
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2. Consensus Theorem in Boolean Algebra.mp4
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MP4
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41.9 MB
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2. Consensus Theorem in Boolean Algebra.srt
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SRT
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8.4 KB
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2. Problem 2.mp4
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MP4
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48.8 MB
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2. Problem 2.srt
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SRT
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13.7 KB
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2. Problem Sheet 2 with Solutions.html
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HTML
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0 B
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2. State Diagram of a Traffic Light Controller.mp4
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MP4
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26.2 MB
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2. State Diagram of a Traffic Light Controller.srt
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SRT
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6.1 KB
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2.1 3 Bit Magnitude Comparator.pdf
|
PDF
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573.4 KB
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2.1 PS2.pdf
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PDF
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2.7 MB
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3. 12. Binary Subtraction in a simple way.mp4
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MP4
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17.7 MB
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3. 12. Binary Subtraction in a simple way.srt
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SRT
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4.1 KB
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3. 17. Let's analyse the three gates NOT NAND NOR.mp4
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MP4
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49.9 MB
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3. 17. Let's analyse the three gates NOT NAND NOR.srt
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SRT
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11.9 KB
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3. 24. Represent any function in SOP and POS - Half way through the design.mp4
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MP4
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42.8 MB
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3. 24. Represent any function in SOP and POS - Half way through the design.srt
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SRT
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7.5 KB
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3. 29. Designing a full adder using two half adders.mp4
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MP4
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39 MB
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3. 29. Designing a full adder using two half adders.srt
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SRT
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9.2 KB
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3. 4. A Special Case in Conversion.mp4
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MP4
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55.7 MB
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3. 4. A Special Case in Conversion.srt
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SRT
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11.2 KB
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3. 42. Working of Latches.mp4
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MP4
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78.7 MB
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3. 42. Working of Latches.srt
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SRT
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13.9 KB
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3. Bubbled gates.mp4
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MP4
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33.9 MB
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3. Bubbled gates.srt
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SRT
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9.2 KB
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3. Code Converters - Notes.html
|
HTML
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0 B
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3. Problem 3.mp4
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MP4
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54.6 MB
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3. Problem 3.srt
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SRT
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14 KB
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3. Problem Sheet 3 with Solutions.html
|
HTML
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0 B
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3.1 Code Converters.pdf
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PDF
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942.2 KB
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3.1 PS3.pdf
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PDF
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3.8 MB
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4. 13. Ways to represent a signed number.mp4
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MP4
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30 MB
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4. 13. Ways to represent a signed number.srt
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SRT
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7.6 KB
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4. 18. Beauty of EXOR Gate!.mp4
|
MP4
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54 MB
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4. 18. Beauty of EXOR Gate!.srt
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SRT
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12.2 KB
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4. 30. Gate Level Schematic for full adders.mp4
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MP4
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32.5 MB
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4. 30. Gate Level Schematic for full adders.srt
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SRT
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6.8 KB
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4. 43. Flip Flops.mp4
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MP4
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170.6 MB
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4. 43. Flip Flops.srt
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SRT
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44.7 KB
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4. 5. Decimal to Hexadecimal conversion.mp4
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MP4
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8 MB
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4. 5. Decimal to Hexadecimal conversion.srt
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SRT
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3.8 KB
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4. Problem 4.mp4
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MP4
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23.3 MB
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4. Problem 4.srt
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SRT
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5.1 KB
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4. Why NAND and NOR are universal gates.mp4
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MP4
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32.3 MB
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4. Why NAND and NOR are universal gates.srt
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SRT
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8.3 KB
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5. 14. 2's complement.mp4
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MP4
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24.8 MB
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5. 14. 2's complement.srt
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SRT
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7.3 KB
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5. 19.9 Important Laws on Boolean Algebra for Logic Design.mp4
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MP4
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49.9 MB
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5. 19.9 Important Laws on Boolean Algebra for Logic Design.srt
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SRT
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12.4 KB
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5. 31. Designing 4 bit Parallel Adders using full adders.mp4
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MP4
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46.2 MB
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5. 31. Designing 4 bit Parallel Adders using full adders.srt
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SRT
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11.3 KB
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5. 6. Decimal to Octal.mp4
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MP4
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16.7 MB
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5. 6. Decimal to Octal.srt
|
SRT
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5.1 KB
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5. Introduction to Counters.mp4
|
MP4
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18.8 MB
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5. Introduction to Counters.srt
|
SRT
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5.7 KB
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5. Problem 5.mp4
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MP4
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20.3 MB
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5. Problem 5.srt
|
SRT
|
5.2 KB
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6. 20. De Morgan's Laws.mp4
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MP4
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15.7 MB
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6. 20. De Morgan's Laws.srt
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SRT
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4.1 KB
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6. 32. An intuition on Propagation Delay.mp4
|
MP4
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18 MB
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6. 32. An intuition on Propagation Delay.srt
|
SRT
|
4.8 KB
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6. 7. Binary to Decimal Conversion!.mp4
|
MP4
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23.7 MB
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6. 7. Binary to Decimal Conversion!.srt
|
SRT
|
8.1 KB
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6. Designing Asynchronous Counters.mp4
|
MP4
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129.3 MB
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6. Designing Asynchronous Counters.srt
|
SRT
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28.8 KB
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6. Problem 6.mp4
|
MP4
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17.3 MB
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6. Problem 6.srt
|
SRT
|
5.8 KB
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7. 21. Let's solve some problems on Boolean Algebra.mp4
|
MP4
|
32.4 MB
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7. 21. Let's solve some problems on Boolean Algebra.srt
|
SRT
|
7.3 KB
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7. 33. Design Steps for Carry look ahead adder.mp4
|
MP4
|
60.9 MB
|
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7. 33. Design Steps for Carry look ahead adder.srt
|
SRT
|
12.2 KB
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7. 8. Converting hex numbers to decimal number.mp4
|
MP4
|
13.4 MB
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7. 8. Converting hex numbers to decimal number.srt
|
SRT
|
3.2 KB
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7. Designing counter to count any number.mp4
|
MP4
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41.3 MB
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7. Designing counter to count any number.srt
|
SRT
|
9.1 KB
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7. Problem 7.mp4
|
MP4
|
24.3 MB
|
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7. Problem 7.srt
|
SRT
|
7.2 KB
|
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8. 34. Different Codes and Code Converter Circuit.mp4
|
MP4
|
53.1 MB
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8. 34. Different Codes and Code Converter Circuit.srt
|
SRT
|
11 KB
|
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8. 9. Binary to hex conversion.mp4
|
MP4
|
12.2 MB
|
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8. 9. Binary to hex conversion.srt
|
SRT
|
3.3 KB
|
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8. Ring Counter and Shift Registers.mp4
|
MP4
|
51.8 MB
|
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8. Ring Counter and Shift Registers.srt
|
SRT
|
13.5 KB
|
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9. 35. Designing a BCD to Gray Code Converter {Full Design}.mp4
|
MP4
|
113.6 MB
|
|
|
9. 35. Designing a BCD to Gray Code Converter {Full Design}.srt
|
SRT
|
21.8 KB
|
|
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9. Johnson's or Twisted Ring Counter Design.mp4
|
MP4
|
65 MB
|
|
|
9. Johnson's or Twisted Ring Counter Design.srt
|
SRT
|
13.6 KB
|
|
|
Bonus Resources.txt
|
TXT
|
409.6 B
|
|
|
Get Bonus Downloads Here.url
|
URL
|
204.8 B
|
