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Advanced Silicon Test and DFT Methodologies

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Advanced Silicon Test and DFT Methodologies

Torrent Contents Size: 4.1 GB

Advanced Silicon Test and DFT Methodologies
Bonus Resources.txt
TXT
102.4 B
Get Bonus Downloads Here.url
URL
204.8 B
~Get Your Files Here !
1 - Introduzione
1. Course Introduction.en_US.srt
SRT
2.6 KB
1. Course Introduction.mp4
MP4
11.5 MB
10 - Implementation Flow & STIL
2 - Foundations of Silicon Test & Fault Models
2. Test Philosophy — Functional vs Structural Testing.en_US.srt
SRT
9.4 KB
2. Test Philosophy — Functional vs Structural Testing.mp4
MP4
67.5 MB
2. lesson_1_1_branded.pptx
PPTX
11.4 MB
3 - Internal Scan Architectures
4 - IEEE Standards & Boundary Scan (JTAG)
10. IEEE 1149.1 — TAP Architecture and Registers.en_US.srt
SRT
9.6 KB
10. IEEE 1149.1 — TAP Architecture and Registers.mp4
MP4
125.4 MB
10. lesson_3_1_branded.pptx
PPTX
6.4 MB
11. TAP State Machine — All 16 States.en_US.srt
SRT
8.4 KB
11. TAP State Machine — All 16 States.mp4
MP4
104.7 MB
11. lesson_3_2_branded.pptx
PPTX
6.4 MB
12. JTAG Standard Instructions — EXTEST, SAMPLE, BYPASS.en_US.srt
SRT
7.5 KB
12. JTAG Standard Instructions — EXTEST, SAMPLE, BYPASS.mp4
MP4
146.9 MB
12. lesson_3_3_branded.pptx
PPTX
10.4 MB
13. Advanced Extensions — IEEE 1149.6 and IEEE 1500.en_US.srt
SRT
7.9 KB
13. Advanced Extensions — IEEE 1149.6 and IEEE 1500.mp4
MP4
111.2 MB
13. lesson_3_4_branded.pptx
PPTX
6.6 MB
14. JTAG Implementation and Debug Applications.en_US.srt
SRT
8.9 KB
14. JTAG Implementation and Debug Applications.mp4
MP4
193.7 MB
14. lesson_3_5_branded.pptx
PPTX
13.6 MB
5 - Test Data Compression
15. Test Data Volume — The Compression Problem.en_US.srt
SRT
9.7 KB
15. Test Data Volume — The Compression Problem.mp4
MP4
133.3 MB
15. lesson_4_1_branded.pptx
PPTX
7 MB
16. Decompressor Architecture.en_US.srt
SRT
9.5 KB
16. Decompressor Architecture.mp4
MP4
201.3 MB
16. lesson_4_2_branded.pptx
PPTX
13.1 MB
17. Compressor Architecture and X-State Tolerance.en_US.srt
SRT
6.5 KB
17. Compressor Architecture and X-State Tolerance.mp4
MP4
135.5 MB
17. lesson_4_3_branded.pptx
PPTX
11.3 MB
18. Serializer and Pin-Limited Test Solutions.en_US.srt
SRT
8.6 KB
18. Serializer and Pin-Limited Test Solutions.mp4
MP4
78.5 MB
6 - On-Chip Clocking & At-Speed Test
19. At-Speed Test — The Need for OCC.en_US.srt
SRT
9.3 KB
19. At-Speed Test — The Need for OCC.mp4
MP4
190.5 MB
20. Launch-on-Capture and Launch-on-Shift Protocols.en_US.srt
SRT
9.3 KB
20. Launch-on-Capture and Launch-on-Shift Protocols.mp4
MP4
88.3 MB
21. Multi-Frequency At-Speed Test.en_US.srt
SRT
9.1 KB
21. Multi-Frequency At-Speed Test.mp4
MP4
147.4 MB
22. At-Speed Sign-Off and Silicon Correlation.en_US.srt
SRT
9.3 KB
22. At-Speed Sign-Off and Silicon Correlation.mp4
MP4
106.2 MB
7 - Advanced Testability Techniques
23. AutoFix — Automated DRC Violation Resolution.en_US.srt
SRT
9.3 KB
23. AutoFix — Automated DRC Violation Resolution.mp4
MP4
104.4 MB
24. Test Points — Control and Observe Insertion.en_US.srt
SRT
9.4 KB
24. Test Points — Control and Observe Insertion.mp4
MP4
115.4 MB
25. Pipelined Scan Enable.en_US.srt
SRT
9.3 KB
25. Pipelined Scan Enable.mp4
MP4
96.8 MB
8 - Low Power DFT
26. Power During Test — The Problem.en_US.srt
SRT
9.1 KB
26. Power During Test — The Problem.mp4
MP4
97.3 MB
27. Shift Power Reduction Techniques.en_US.srt
SRT
9.6 KB
27. Shift Power Reduction Techniques.mp4
MP4
112.4 MB
28. Capture Power and Power-Aware ATPG.en_US.srt
SRT
9 KB
28. Capture Power and Power-Aware ATPG.mp4
MP4
108.1 MB
9 - Memory BIST & Fault Diagnosis
29. Memory Fault Models and March Algorithms.en_US.srt
SRT
8.3 KB
29. Memory Fault Models and March Algorithms.mp4
MP4
104.9 MB
30. MBIST Architecture and Implementation.en_US.srt
SRT
9.5 KB
30. MBIST Architecture and Implementation.mp4
MP4
101.9 MB
31. Fault Diagnosis — From ATE Failure to Physical Defect.en_US.srt
SRT
9.5 KB
31. Fault Diagnosis — From ATE Failure to Physical Defect.mp4
MP4
104 MB
32. Logic BIST and Embedded Test.en_US.srt
SRT
10 KB
32. Logic BIST and Embedded Test.mp4
MP4
120.2 MB
6. The Scan Flip-Flop — Architecture and Operation.en_US.srt
SRT
9.2 KB
6. The Scan Flip-Flop — Architecture and Operation.mp4
MP4
151.5 MB
6. lesson_2_1_branded.pptx
PPTX
9.4 MB
7. Scan Chain Configuration and Balancing.en_US.srt
SRT
7.4 KB
7. Scan Chain Configuration and Balancing.mp4
MP4
101.3 MB
7. lesson_2_2_branded.pptx
PPTX
7.6 MB
8. Multiple Clock Domains and Lock-Up Latches.en_US.srt
SRT
8.9 KB
8. Multiple Clock Domains and Lock-Up Latches.mp4
MP4
167.4 MB
8. lesson_2_3_branded.pptx
PPTX
10.5 MB
9. Scan DRC Rules and Sign-Off.en_US.srt
SRT
9.4 KB
9. Scan DRC Rules and Sign-Off.mp4
MP4
108.2 MB
9. lesson_2_4_branded.pptx
PPTX
5.6 MB
3. Stuck-at Fault Model — Controllability and Observability.en_US.srt
SRT
8.8 KB
3. Stuck-at Fault Model — Controllability and Observability.mp4
MP4
77.8 MB
3. lesson_1_2_branded.pptx
PPTX
8.1 MB
4. Dynamic Fault Models — TDF and Path Delay.en_US.srt
SRT
7.9 KB
4. Dynamic Fault Models — TDF and Path Delay.mp4
MP4
121.1 MB
4. lesson_1_3_branded.pptx
PPTX
8 MB
5. Test Quality Metrics — FC, TC, ATPG Effectiveness.en_US.srt
SRT
9.1 KB
5. Test Quality Metrics — FC, TC, ATPG Effectiveness.mp4
MP4
106.3 MB
5. lesson_1_4_branded.pptx
PPTX
5.9 MB
33. The Complete DFT Implementation Flow.en_US.srt
SRT
8.9 KB
33. The Complete DFT Implementation Flow.mp4
MP4
103.3 MB
34. STIL and SPF — ATE Protocol Files.en_US.srt
SRT
8.2 KB
34. STIL and SPF — ATE Protocol Files.mp4
MP4
92.4 MB
35. DFT Project Management and Best Practices.en_US.srt
SRT
10 KB
35. DFT Project Management and Best Practices.mp4
MP4
123.5 MB

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